1. Field of the Invention
This invention relates generally to the field of semiconductor device manufacturing and, more particularly, to a method and apparatus for determining electromagnetic properties of a process layer using scatterometry measurements.
2. Description of the Related Art
There is a constant drive within the semiconductor industry to increase the quality, reliability and throughput of integrated circuit devices, e.g., microprocessors, memory devices, and the like. This drive is fueled by consumer demands for higher quality computers and electronic devices that operate more reliably. These demands have resulted in a continual improvement in the manufacture of semiconductor devices, e.g., transistors, as well as in the manufacture of integrated circuit devices incorporating such transistors. Additionally, reducing the defects in the manufacture of the components of a typical transistor also lowers the overall cost per transistor as well as the cost of integrated circuit devices incorporating such transistors.
The technologies underlying semiconductor processing tools have attracted increased attention over the last several years, resulting in substantial refinements. However, despite the advances made in this area, many of the processing tools that are currently commercially available suffer certain deficiencies. In particular, such tools often lack advanced process data monitoring capabilities, such as the ability to provide historical parametric data in a user-friendly format, as well as event logging, real-time graphical display of both current processing parameters and the processing parameters of the entire run, and remote, i.e., local site and worldwide, monitoring. These deficiencies can engender nonoptimal control of critical processing parameters, such as throughput, accuracy, stability and repeatability, processing temperatures, mechanical tool parameters, and the like. This variability manifests itself as within-run disparities, run-to-run disparities and tool-to-tool disparities that can propagate into deviations in product quality and performance, whereas an ideal monitoring and diagnostics system for such tools would provide a means of monitoring this variability, as well as providing means for optimizing control of critical parameters.
Semiconductor devices are manufactured from wafers of a substrate material. Layers of materials are added, removed, and/or treated during fabrication to create the electrical circuits that make up the device. The fabrication essentially comprises four basic operations. Although there are only four basic operations, they can be combined in hundreds of different ways, depending upon the particular fabrication process.
The four operations typically used in the manufacture of semiconductor devices are:                layering, or adding thin layers of various materials to a wafer from which a semiconductor device is produced;        patterning, or removing selected portions of added layers;        doping, or placing specific amounts of dopants in the wafer surface through openings in the added layers; and        heat treatment, or heating and cooling the materials to produce desired effects in the processed wafer.        
The various layers used for forming the features have many specialized functions. Certain layers are used to form conductive features, others perform insulating features, and still others are intermediate layers used to enhance the functionality of the processing steps used to pattern and form the functional layers. In some cases, the ability of a layer to perform its intended function is based mostly on its physical properties, such as its material of construction and thickness, while the ability of other layers to perform their intended function rests on electromagnetic properties, such as refractive index, that may vary based on the particular process used to form the layer.
A commonly used conductive layer in a semiconductor device is polysilicon. One important application for a polysilicon layer is in forming a gate electrode in a transistor. To increase the accuracy of the photolithography process used to pattern the polysilicon layer to define the gate electrodes, an anti-reflective coating (ARC) layer, such as silicon oxynitride (SiON), is sometimes formed over the polysilicon layer prior to patterning to minimize notches caused by reflections during photolithographic techniques. A photoresist layer is subsequently formed over the ARC layer and patterned to allow etching of the polysilicon layer. The ARC layer reduces the reflections and allows more effective patterning of the photoresist layer, which ultimately results in more effective formation of the gate electrodes from the polysilicon layer. The ability of an ARC layer to reduce the effects of reflections depends not only on its material of construction (i.e., SiON) and thickness, but also on the refractive index of the layer (i.e., related to reflectivity). The refractive index of the ARC layer may vary depending on the specific processing environment in which it is formed. Because of the variety of factors influencing the effectiveness of an ARC layer, measuring its thickness alone (i.e., during or after the deposition process) is not sufficient to gauge whether it will adequately perform its intended function.
The present invention is directed to overcoming, or at least reducing the effects of, one or more of the problems set forth above.